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Some details of Advanced RISC Machine (ARM –LPC2129)

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The ARM is a 32-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by ARM Limited. It was known as the Advanced RISC Machine, and before that as the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit ISA in terms of numbers produced They were originally conceived as a processor for desktop personal computers by Acorn Computers, a market now dominated by the x86 family used by IBM PC compatible computers. The relative simplicity of ARM processors made them suitable for low power applications. This has made them dominant in the mobile and embedded electronics market as relatively low cost and small microprocessors and microcontrollers.


The LPC2129 are based on a 16/32 bit ARM7TDMI-STM CPU with real-time emulation and embedded trace support, together with 128/256 kilobytes (kB) of embedded high speed flash memory. A 128-bit wide internal memory interface and a unique accelerator architecture enable 32-bit code execution at maximum clock rate. For critical code size applications, the alternative 16-bit Thumb Mode reduces code by more than 30% with minimal performance penalty.

With their compact 64 and 144 pin packages, low power consumption, various 32-bit timers, combination of 4-channel 10-bit ADC and 2/4 advanced CAN channels or 8-channel 10-bit ADC and 2/4 advanced CAN channels (64 and 144 pin packages respectively), and up to 9 external interrupt pins these microcontrollers are particularly suitable for industrial control, medical systems, access control and point-of-sale.

Number of available GPIOs goes up to 46 in 64 pin package. In 144 pin packages number of available GPIOs tops 76 (with external memory in use) through 112 (single-chip application). Being equipped wide range of serial communications interfaces, they are also very well suited for communication gateways, protocol converters and embedded soft modems as well as many other general-purpose applications.

Advanced RISC  Machine Features

1.  16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.

2.  16 kB on-chip Static RAM.

3. 128/256 kB on-chip Flash Program Memory. 128-bit wide

Interface/accelerator enables high speed 60 MHz operation.

4. in-System Programming (ISP) and In-Application Programming

(IAP) via on-chip boot-loader software. Flash programming takes 1ms

Per 512 byte line. Single sector or full chip erase takes 400 ms.

5. Embedded-ICE-RT interface enables breakpoints and watch points.

Interrupt service routines can continue to execute while the

Foreground task is debugged with the on-chip Real-Monitor. Software.

6. Embedded Trace Microcell enables non-intrusive high speed real-time

Tracing of instruction execution.

7. Two interconnected CAN interfaces with advanced acceptance filters.

8. Four channel 10-bit A/D converter with conversion time as low as2.44 ms.

9. Multiple serial interfaces including two UARTs (16C550), Fast I2C

(400 Kbits/s) and two SPIs

10. 60 MHz maximum CPU clock available from programmable on-chip

Phase-Locked Loop with settling time of 100 ms.

11 Vectored Interrupt Controller with configurable priorities and vector

Addresses.

12. Two 32-bit timers (with four capture and four compare channels),

Dual power supply:

1. CPU operating voltage range of 1.65V to 1.95V (1.8 V ±0.15 V).

2. I/O power supply range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V

Tolerant I/O pads.

ARCHITECTURAL  OVERVIEW

 

The LPC2129 consists of an ARM7TDMI-S CPU with emulation support, the ARM7 Local Bus for interface to on-chip memory controllers, the AMBA Advanced High-performance Bus (AHB) for interface to the interrupt controller, and the VLSI Peripheral Bus (VPB, a compatible superset of ARM’s AMBA Advanced Peripheral Bus) for connection to on-chip peripheral functions. The LPC2119/2129/2194/2292/2294 configures the ARM7TDMI-S processor in little-endian byte order.

AHB peripherals are allocated a 2 megabyte range of addresses at the very top of the 4 gigabyte ARM memory space. Each AHB peripheral is allocated a 16 kilobyte address space within the AHB address space. LPC2129 peripheral functions (other than the interrupt controller) are connected to the VPB bus. The AHB to VPB Bridge interfaces the VPB bus to the AHB bus. VPB peripherals are also allocated a 2 megabyte range of addresses, beginning at the 3.5 gigabyte address point. Each VPB peripheral is allocated a 16 kilobyte address space within the VPB address space.

APPLICATIONS

• Industrial control

• Medical systems

• Access control

• Point-of-sale

• Communication gateway

• Embedded soft modem

• General purpose applications

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