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Design and simulation of Turbo encoder in quantum dot cellular automata
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Design and simulation of Turbo encoder in quantum-dot cellular automata

Category : VLSI


Sub Category : QCA TECHNOLOGY


Project Code : ITVL21


Project Abstract

Quantum-dot cellular automata (QCA) is a potential nano electronic technology for information processing. To be considered as a suitable CMOS candidate, QCA must be able to implement complex real-time applications of bit-serial information processing, which lacks of enough investigation. Turbo encoding is one of such applications, which refers to three representative issues of bit-serial circuits: convolution computation, feedback, and serial data permutation. The inherent shift-register nature of QCA offers an advantage to performing convolution computation but poses handicaps to resolve the latter two issues. How to manage the ambivalent effects of shift-register nature is investigated in this work, which determines the efficient design of Turbo encoder. A strobe scheme based on main-branch wire crossing is proposed to efficiently make data choosing that is the communally key procedure of the implementation of feedback and serial data permutation. On this basis, a method of implementing recursive convolutional encoder with multi feedback is proposed. A two-stage pipelining interleaver is presented. Finally, a Turbo encoder is implemented using QCA based on these approaches and simulation demonstrates that it performs well.

PROPOSED SYSTEM:

It is an extreme case of single-feedback for there is only one CLK delay for the loop. Therefore, if the proposed scheme can cope with this case, it would be fit for the other single-feedbacks. It shows the transformed block diagram of the RC encoder in Fig. It is concatenated by a convolution computation element (marked by a dashed rectangle) and a single-feedback loop. To perform the convolution computation we employ a fan out to offer parallel paths, instead of the serial-to-parallel structure in conventional circuit. All the paths are assigned with different numbers of delays, so that every bit passes through them at different speeds. Thus the bits received at different time can meet at the computation unit. And code words are obtained in succession.

Compared with single-feedback, implementation of multi-feedback in QCA almost meets more complex time issues caused by the interconnection. Moreover, there are lots of cases that cannot be straightly implemented in spite of the proposed scheme. For example, Fig. shows the block diagram of a typical RC encoder with multi-feedback. Each register is connected with a feedback path. It is impossible to meet the real time requirement if the multi-feedback is straightly constructed by QCA devices.
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